Work

High Speed Low Power 16×16 Dadda Multiplier by Utilizing Reversible Gates

Year: 2025

Type: conference-paper

Source: IEEE International Conference on VLSI Systems, Architecture, Technology and Applications (VLSI SATA)

DOI: 10.1109/vlsisata65374.2025.11070214

Authors: Jasmine Nessa, S. Dash, M.C Tripathy

Institution: Odisha University of Technology and Research

Language: English

Topic: Low-power high-performance VLSI design

Subfield: Electrical and Electronic Engineering

Field: Engineering

Domain: Physical Sciences

Open Access status: closed

OpenAlex ID: W4412405463

FWCI: 4.717

Cites: 9

Cited by: 2

Related to: 10