Comprehensive Study of UVM (Universal Verification Methodology) Verification Reusability: Multi-Protocol Case Studies
Year: 2025
Type: article
Abstract: This paper presents an extensive investigation into the reusability aspects of Universal Verification Methodology (UVM) through comprehensive analysis and implementation of multiple protocol verification platforms. The study demonstrates reusability across verification components, platforms, test scenarios, and sequence libraries through three distinct case studies: UART communication protocol, AXI4-Lite bus interface, and SPI master-slave architecture. Our research establishes quantitative metrics for measuring reusability effectiveness and provides a framework for maximizing verification asset reuse across different design verification projects. DOI : https://doi.org/10.52783/pst.2181
Source: Power System Technology
DOI: 10.52783/pst.2181
Author: Harinagarjun Chippagi
Institution: Jawaharlal Nehru Technological University Anantapur
Language: English
Subfield: Hardware and Architecture
Field: Computer Science
Domain: Physical Sciences
Open Access status: bronze
OpenAlex ID: W4412883261