Work

A Multi-Channel Pulse Signal Acquisition SoC Based on Signal Processing Hardware Acceleration Algorithm

Year: 2025

Type: conference-paper

Abstract: This work presents a hardware acceleration algorithm for pulse signal processing, designs a multi-channel pulse signal acquisition SoC, and efficiently deploys the algorithm in the SoC to form a complete pulse signal acquisition and processing system while minimizing power consumption and resource usage. The pulse signal processing algorithm enables real-time processing of multi-channel pulse signals with configurable sampling rates. The proposed SoC is implemented on the ZYNQ-AX7020 development board with power consumption of 0.169 W and logic resource utilization of 18.02%, efficiently performs heart rate anomaly detection and can be deployed on resource-constrained hardware platforms. Experimental results show that the running time of the hardware acceleration algorithm is 1.44 ms for specific pulse signals, attaining a speed improvement of 9.53 times compared to the software implementation. This work provides a promising solution for the large-scale and convenient acquisition and processing of pulse signals, facilitating the development of wearable devices and smart healthcare.

Source: International Conference on Biomedical and Intelligent Systems (IC-BIS)

DOI: 10.1145/3745034.3745084

Authors: Ao Qie, Xueqing Li, Jie Yang, Xinan Wang

Institution: Peking University

Language: English

Topic: Embedded Systems Design Techniques

Subfield: Hardware and Architecture

Field: Computer Science

Domain: Physical Sciences

Open Access status: hybrid

Funder: Science and Technology Planning Project of Shenzhen Municipality

Award: G6164244289