A Digital Imager Architecture with On-Chip Compression for High-Speed Imaging Applications
Year: 2025
Type: conference-paper
Institutions: University of Trento, Fondazione Bruno Kessler
Language: English
Topic: CCD and CMOS Imaging Sensors
Subfield: Electrical and Electronic Engineering
Field: Engineering
Domain: Physical Sciences
Open Access status: closed
OpenAlex ID: W4413067644
