Work

An Automated Method for Eliminating Oscillation in Combinational Logic Circuit

Year: 2025

Type: conference-paper

Source: International Symposium of Electronics Design Automation (ISEDA)

DOI: 10.1109/iseda65950.2025.11100430

Authors: Boyu Shi, Yilong Li, Wanying Yuan, Qingsheng Qiu, Ziwen Zheng, Chao Wang

Institution: Southeast University

Language: English

Topic: VLSI and FPGA Design Techniques

Subfield: Electrical and Electronic Engineering

Field: Engineering

Domain: Physical Sciences

Open Access status: closed

OpenAlex ID: W4413120719

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Cites: 13

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Related to: 10