Work

IncreDFlip: Incremental Dataflow-Driven Macro Flipping for Efficient Macro Placement Refinement

Year: 2025

Type: conference-paper

Source: International Symposium of Electronics Design Automation (ISEDA)

DOI: 10.1109/iseda65950.2025.11100996

Authors: Xiaotian Zhao, Jiayin Chen, Zixuan Li, Yichen Cai, Xinfei Guo

Institutions: Shanghai Jiao Tong University, University of Michigan

Language: English

Topic: VLSI and FPGA Design Techniques

Subfield: Electrical and Electronic Engineering

Field: Engineering

Domain: Physical Sciences

SDG: Industry, innovation and infrastructure

Open Access status: closed

Funder: National Science and Technology Major Project

OpenAlex ID: W4413121887

FWCI:

Cites: 15

Cited by:

Related to: 10