Year: 2025
Type: article
Abstract: This paper introduces a Verilog Hardware Description Language (HDL) implementation of a specialized multiplier tailored for image processing, with a specific emphasis on edge detection applications. The design integrates an approximate 4-2 compressor and an error correction module, optimizing accuracy while minimizing hardware complexity. Rigorous evaluations, employing ModelSim and MATLAB simulations, validate the design's superior accuracy compared to conventional multipliers, achieved with minimal additional hardware complexity. The Verilog HDL implementation is precisely engineered for seamless integration into existing image processing systems, showcasing adaptability and potential across diverse applications. Executed with precision using ModelSim 6.4c and synthesized with the Xilinx Tool, the multiplier strategically incorporates compressors to enhance performance, particularly focusing on efficiency improvement in image multiplication for masking applications. This work strategically converges hardware innovation and image processing intricacies, delving into multiplier design within the realm of edge detection. The proposed system provides an efficient solution, ensuring heightened accuracy and performance while maintaining ease of integration into existing systems. Sobel Image Masking, a fundamental technique in edge detection, further augments the paper's practical implications. The multiplication-based approach in Sobel Image Masking employs various advanced multipliers like Booth, Dadda, Shift and add Multipliers, and Wallace multipliers, elucidating their pivotal roles in augmenting gradient values through convolution operations. In alignment with Artificial Intelligence (AI) and Edge Computing, this paper underscores the significance of computational efficiency in image processing. Leveraging Verilog HDL, integrating error correction mechanisms, and applying the specialized multiplier to image masking collectively contribute to advancing AI technologies, especially in edge computing scenarios where task-specific hardware optimization is crucial. Positioned at the intersection of hardware design, image processing, and AI, this paper underscores its relevance in the dynamic landscape of intelligent systems and edge computing, emphasizing the synergy between hardware advancement and artificial intelligence in the realm of edge computing.
Author: Rajarajeshwari G
Language: English
Subfield: Electrical and Electronic Engineering
Field: Engineering
Domain: Physical Sciences
Open Access status: diamond
OpenAlex ID: W4413193901