Work

12-bit 100 MS/s Time-Relaxed Interleaved Randomly Selected DAC for Real-time FOG Systems

Year: 2025

Type: conference-paper

DOI: 10.1109/eaic66483.2025.11101650

Authors: Pradyumna Vellanki, Jun-Yu Chang, Sai Nikhil Karnala, Hsin-Cheng Liu, L S S Pavan Kumar Chodisetti, Chua-Chin Wang

Institution: National Sun Yat-sen University

Language: English

Topic: Analog and Mixed-Signal Circuit Design

Subfield: Biomedical Engineering

Field: Engineering

Domain: Physical Sciences

Open Access status: closed

OpenAlex ID: W4413204408

FWCI: 2.903

Cites: 11

Cited by: 1

Related to: 10