A 2–18-GHz Reconfigurable Phased-Array Receiver Front-End in 65-nm CMOS
Year: 2025
Type: article
Authors: Shuangyang Wu, Jianbin Liu, Zhihua Wei, Yuanan Liu, Pei-Ling Chi, Tao Yang
Language: English
Subfield: Electrical and Electronic Engineering
Field: Engineering
Domain: Physical Sciences
Open Access status: closed
Awards: G2635670313, G6445476571, G7234345539
OpenAlex ID: W4413277874
