A 180-nm CMOS Integrated Capacitance-to-Time Converter for Capacitive Sensing Applications
Year: 2025
Type: article
Abstract: This article presents the implementation of a capacitance-to-time converter in standard 0.18-$\mu \text {m}$CMOS technology. It is based on a square-wave relaxation oscillator that incorporates both pulsewidth modulation (PWM) and proportional to magnitude (PM) dependencies. The circuit is designed to interface with differential capacitance sensors but can also interface with single-capacitance sensors using a reference capacitor. It works with various capacitive values, ranging from a few nanofarads to less than one picofarad, considering different external${R}_{{0}}$resistor values. Characterization tests proved that the fabricated chips exhibit the expected performance across the full range of use, achieving a sensitivity of${207}~\mu $s/$\Delta $pF in the differential mode (${110}~ \mu $s/pF in the single mode) and a resolution of 0.5 fF in the differential mode ((0.9 fF in the single mode). The circuit occupies a silicon area of${0.0044}~ \text {mm}^{2}$, with a maximum power consumption of 1.5 mW. The circuit has also been successfully tested in real applications, such as measuring liquid levels in microfluidic applications. By using COTS level-meters, it achieved a sensitivity of 0.4 pF/mL with a resolution of${100}~ \mu $L. Measuring the dielectric constant in liquids was also demonstrated by using specifically designed 3-D-printed fluidic capacitance sensors.
Source: IEEE Sensors Journal
Language: English
Subfield: Biomedical Engineering
Field: Engineering
Domain: Physical Sciences
Open Access status: hybrid
Estimated APC paid: $2,645
OpenAlex ID: W4413444350
