Year: 2025
Type: preprint
Abstract: A zero-impedance line (ZIL) is a line with very small impedance. A ZIL is modeled by collapsing its terminal buses into a superbus which is used throughout the solution. As contingency is a localized change to the base case system, topological and sparsity-based localization are used to obtain post-contingency system. Firstly, a fast incremental topology processor locally updates the base case topology to obtain an accurate description of the topological changes to the super bus model. This description is used to rapidly update the base case system matrix LDU factors using the concept of a path graph. Using base case solution as initial condition, the postcontingency solution is rapidly obtained using AC power flow. Localization speeds up the post-contingency solution, while ZIL modeling improves its quality.
Authors: Vladimir Brandwajn, Dinesh Ranbhise, Luc Radu
Institution: Hitachi (Japan)
Language: English
Subfield: Electrical and Electronic Engineering
Field: Engineering
Domain: Physical Sciences
Open Access status: gold
OpenAlex ID: W4413812651