Work

On the role of power dissipation in the Post-BD behavior of FDSOI NanoWire FETs

Year: 2025

Type: article

Abstract: Dielectric Breakdown, which has been associated to a progressive wear-out of the gate dielectric, has been one of the most detrimental failure mechanisms in CMOS devices. With downscaling, new device architectures and/or materials have been introduced, so that the BD impact at device (and circuit) level in these new structures must be evaluated. In this work, the dielectric BD and the post-BD behavior in largely scaled FDSOI nanowire transistors with high-k gate dielectric have been characterized, using the energy and the power dissipated by the device under test as key parameters.Aging, FDSOI, nanowire, high-k, reliability, Dielectric Breakdown.

Source: Solid-State Electronics

DOI: 10.1016/j.sse.2025.109228

Authors: R. Goyal, A. Crespo-Yepes, M. Porti, R. Rodriguez, M. Nafria

Institution: Universitat Autònoma de Barcelona

Language: English

Topic: Semiconductor materials and devices

Subfield: Electrical and Electronic Engineering

Field: Engineering

Domain: Physical Sciences

Open Access status: hybrid

Estimated APC paid: $2,410

Funders: Generalitat de Catalunya, European Regional Development Fund, Agencia Estatal de Investigación