Low - latency Data Exchange Technology for Multiple Embedded Artificial Intelligence Processors Based on PCIE
Year: 2025
Type: conference-paper
Abstract: To fully leverage the performance advantages of multiple embedded artificial intelligence processors, it is crucial to achieve efficient data exchange. This paper conducts an in - depth study on the low - latency data exchange technology for multiple embedded artificial intelligence processors based on PCIE. It elaborates on the technical foundation of PCIE, the data exchange architecture and mechanisms of multiple embedded AI processors, and proposes effective data exchange optimization strategies. The experimental results show that in the scenario of large - volume data transmission, the transmission latency of the data exchange method based on PCIE is reduced by more than 50% compared with the traditional data exchange method, and the data throughput is increased by more than 3 times. In the small - volume data transmission scenario with high real - time requirements, the latency of the data exchange method based on PCIE can be stably maintained within 1 microsecond. The results of the system test verify the feasibility and advantages of this technology.
Author: Chaojun Li
Institution: Wuhan Donghu University
Language: English
Subfield: Hardware and Architecture
Field: Computer Science
Domain: Physical Sciences
Open Access status: hybrid
OpenAlex ID: W4413845180