Work

Analysis of charge-trapping effects in ultra-low current metal–oxide–semiconductor–oxide–semiconductor devices

Year: 2025

Type: article

Abstract: In this paper, we present the study of charge-trapping effects in ultra-low current metal–oxide–semiconductor–oxide–semiconductor structures. We fabricated the Al/SiOx/a-Si/SiOx/n++ Si devices using low-temperature processes with various oxide thicknesses and performed electrical characterization. Discharging current transient spectroscopy was used to analyze the charge-trapping effects. This allowed us to identify the trap levels and corresponding trap densities within the material stack. The presented analysis shows that we can distinguish multiple trap levels in the investigated structures, and the appropriate model can accurately describe the transient behavior of the observed discharging current. We show that the presented methodology is very useful for analyzing traps, obtaining information for evaluating the device properties, and optimizing the technology of charge-trapping memories.

Source: AIP Advances

DOI: 10.1063/5.0259827

Authors: Piotr Wiśniewski, Piotr Jeżak, Michał Jarosik

Institution: Warsaw University of Technology

Language: English

Topic: Semiconductor materials and devices

Subfield: Electrical and Electronic Engineering

Field: Engineering

Domain: Physical Sciences

Open Access status: gold

Estimated APC paid: $1,350

Funder: Politechnika Warszawska