Work

Design of Adders Using Pass Transistor Logic for Wallace Tree Multiplier in 45nm Process

Year: 2025

Type: conference-paper

Source: International Conference for Emerging Technology (INCET)

DOI: 10.1109/incet64471.2025.11140259

Authors: Ullas Upendra Achari, Bhaskar Reddy V, M Rajesh Kiran, Aswini N

Institution: PES University

Language: English

Topic: Low-power high-performance VLSI design

Subfield: Electrical and Electronic Engineering

Field: Engineering

Domain: Physical Sciences

SDG: Industry, innovation and infrastructure

Open Access status: closed

OpenAlex ID: W4413980289

FWCI:

Cites: 8

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Related to: 10