Work

Design of AHB-to-Wishbone Protocol Translator with SystemVerilog Verification for SoC and ASIC

Year: 2025

Type: conference-paper

Source: International Conference on Energy, Power and Environment (ICEPE)

DOI: 10.1109/icepe65965.2025.11139557

Authors: Vaishali Jabade, Gauri Gund, Yash Gupta, Madhura Ingole

Institution: Vishwakarma Institute of Technology

Language: English

Topic: Embedded Systems and FPGA Applications

Subfield: Electrical and Electronic Engineering

Field: Engineering

Domain: Physical Sciences

SDG: Industry, innovation and infrastructure

Open Access status: closed

OpenAlex ID: W4414010251

FWCI:

Cites: 7

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Related to: 10