Year: 2025
Type: article
Abstract: The aim of this study is to investigate the overcurrent turn-off robustness limit of SiC MOSFETs from three different manufacturers with three different cell technologies up to very high turn-off currents to determine a possible destruction limit and failure type. The influence of the negative gate-source voltage (VGS,off) was studied because of the high drain-source overvoltage in connection with the decreased VGS,off, which is the most critical point for the gate oxide field stress for the different cell technologies. All measurements were performed at a positive gate-source voltage (VGS,on) above the specified datasheet values to reach high currents without channel pinch-off. In addition, the influence of temperature on the overcurrent robustness was studied. Finally, TCAD simulations were performed to determine the reason for the failure mechanism under the overcurrent turn-off conditions. All the manufacturer devices can withstand several times higher gate-source voltages under overcurrent conditions than the values recommended in the datasheet.
Source: Key engineering materials
DOI: 10.4028/p-o0yawh
Authors: Madhu Lakshman Mysore, Darshan Koorana Prasanna Kumar, Chao Hao Wang, Josef Lutz, Thomas Basler
Institution: Chemnitz University of Technology
Language: English
Subfield: Electrical and Electronic Engineering
Field: Engineering
Domain: Physical Sciences
Open Access status: hybrid
OpenAlex ID: W4414314685