Year: 2025
Type: article
Abstract: This paper presents an advanced W-band bidirectional Power Amplifier–Low Noise Amplifier (PALNA) implemented using 130 nm SiGe BiCMOS technology. The proposed RF front-end eliminates the need for conventional transmit/receive (T/R) switches by employing a bidirectional architecture with a passive matching network. This approach minimizes area requirements and reduces signal losses. Post-layout simulation results demonstrate that the designed PALNA achieves a peak small-signal gain of 30 dB in Tx mode and 26 dB in Rx mode, with reverse isolation better than 40 dB. The 3 dB bandwidth spans from 94 to 106 GHz. In LNA mode, the design achieves a minimum noise figure of 6 dB at 100 GHz, remaining below 6.5 dB across the entire 3 dB bandwidth. In PA mode, the simulated saturated output power is 10.5 dBm, with a maximum power-added efficiency of 12% at 100 GHz. The chip size is 0.7 mm2 including pads. It consumes 78 and 22 mW in the Tx and Rx modes, respectively.
Source: Electronics
Language: English
Subfield: Electrical and Electronic Engineering
Field: Engineering
Domain: Physical Sciences
Open Access status: gold
Estimated APC paid: $2,896
Funder: Bpifrance
Award: G8763281123
OpenAlex ID: W4414329905