Comparative Analysis of the Number of Mounting Elements and Wire Layers of an Integrated Circuit and a Printed Circuit Board Design
Year: 2025
Type: conference-paper
Abstract: The fair compromise method is proposed, by which the number of the wire layers and elements of the mounting field of the IC and MPC are determined.A system of programs in the algorithmic language C++ and the application program Wolfram-Mathematica has been developed, which allows, at an early stage of design, to automatically determine the best ratio of the number of wire layers and elements of the mounting field of the IC and MPC platform by the minimum area of the mounting field and the maximum fill factor.
DOI: 10.51408/csit2025_52
Institution: National Polytechnic University of Armenia
Language: English
Subfield: Electrical and Electronic Engineering
Field: Engineering
Domain: Physical Sciences
Open Access status: gold
OpenAlex ID: W4414454252