Work

Navigating the Design Space: Analyzing Full Adder Implementations for Power and Delay Optimization

Year: 2025

Type: conference-paper

Source: International Conference on Intelligent Technologies (CONIT)

DOI: 10.1109/conit65521.2025.11166997

Authors: Abhishek Mishra, Sanjeet Kumar Sinha, Sweta Chander

Institution: Lovely Professional University

Language: English

Topic: Low-power high-performance VLSI design

Subfield: Electrical and Electronic Engineering

Field: Engineering

Domain: Physical Sciences

Open Access status: closed

Funders: Lovely Professional University, Science and Engineering Research Board

OpenAlex ID: W4414458717

FWCI: 4.601

Cites: 5

Cited by: 2

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