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Hardware-Aware Neural Architecture Search for Memory constrained Embedded Neural Networks Accelerators

Year: 2025

Type: conference-paper

Source: IEEE International Conference on Artificial Intelligence Circuits and Systems (AICAS)

DOI: 10.1109/aicas64808.2025.11173090

Authors: Andrea Castagnetti, Alain Pegatoquet, Benoît Miramond, Olivier Montfort, Vincent Huard

Institutions: Laboratoire d'Électronique, Antennes et Télécommunications, Dolphin Design (France)

Language: English

Topic: Advanced Neural Network Applications

Subfield: Computer Vision and Pattern Recognition

Field: Computer Science

Domain: Physical Sciences

Open Access status: closed

Funder: Agence Nationale de la Recherche

Award: 3IA Côte d'Azur 2030

OpenAlex ID: W4414500063

FWCI: 1.597

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Cited by: 2

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