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A Minimal Hardware Implementation of a Neural Integrator with Graded Persistent Activity

Year: 2025

Type: conference-paper

Source: IEEE International Conference on Artificial Intelligence Circuits and Systems (AICAS)

DOI: 10.1109/aicas64808.2025.11173163

Authors: Jiaming Wu, Adrien d’Hollande, Haoran Du, Marcelo Rozenberg

Institutions: Centre National de la Recherche Scientifique, Université Paris-Saclay, Laboratoire de physique des Solides

Language: English

Topic: Advanced Memory and Neural Computing

Subfield: Electrical and Electronic Engineering

Field: Engineering

Domain: Physical Sciences

Open Access status: closed

OpenAlex ID: W4414500383

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Cites: 22

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