Dynamic pass bias control for temperature-resilient neural networks using vertical NAND flash memory
Year: 2025
Type: article
Abstract: Vertical NAND (V-NAND) flash memory has emerged as a promising candidate for neuromorphic computing platforms due to its high density, scalability, and reliability. However, synaptic weights stored in V-NAND cells are highly sensitive to ambient temperature variations, resulting in significant conductance shifts that degrade the inference accuracy of neural networks. To address this challenge, we propose a dynamic pass bias (DPB) control scheme that compensates for temperature-induced weight variations without requiring memory reprogramming or additional hardware overhead. By adaptively adjusting the pass bias applied to unselected word-lines during read operations, the DPB scheme effectively stabilizes the differential conductance representation of weights under thermal fluctuations. In addition, we introduce a temperature-adaptive biasing circuit composed of a single-crystalline silicon MOSFET and V-NAND strings. Exploiting their opposing temperature-dependent resistance characteristics, this passive circuit naturally reduces the pass bias as temperature rises, enabling real-time analog compensation without explicit sensing or digital control logic. Experimental measurements on commercial V-NAND devices fabricated with over 100 WL layers reveal substantial shifts in bit-line currents with increasing temperature. Simulation results based on CIFAR-10 image classification using a VGG-11 network demonstrate that the DPB scheme significantly mitigates accuracy degradation across a wide temperature range. Notably, adjusting pass bias at lower temperatures improves classification accuracy by up to 10.5%p compared to conventional fixed-bias operations. These results highlight the effectiveness of dynamic pass bias control-both digitally and circuit-assisted-as a lightweight and scalable solution for enhancing the temperature resilience of V-NAND flash memory-based neural networks.
Source: Nano Convergence
Authors: Sung-Ho Park, Jiseong Im, Jonghyun Ko, Joon Hwang, Yeongheon Yang, Jong-Won Back, Ryun-Han Koo, In-Seok Lee, Dongbeen Shin, Mingyun Oh, Gyuweon Jung, Jong-Ho Lee
Institutions: Seoul National University, SK Hynix (South Korea)
Language: English
Subfield: Electrical and Electronic Engineering
Field: Engineering
Domain: Physical Sciences
Open Access status: gold
Estimated APC paid: $3,990
Awards: G1251031942, G30685149, G6040451279
OpenAlex ID: W4414650210
