Work

DPIM: A 2T1C eDRAM Transformer-in-Memory Chip With Sparsity-Aware Quantization and Heterogeneous Dense–Sparse Core

Year: 2025

Type: article

Source: IEEE Journal of Solid-State Circuits

DOI: 10.1109/jssc.2025.3607826

Authors: Donghyuk Kim, Jae-Young Kim, Hyunjun Cho, Seungjae Yoo, Sukjin Lee, Sungwoong Yune, Sejeong Yang, Hoichang Jeong, Keonhee Park, Ki-Soo Lee, Jongchan Lee, Chanheum Han, Gunmo Koo, Yuli Han, Jaejin Kim, Jaemin Kim, Kyuho Jason Lee, Joo-Hyung Chae, Kunhee Cho, Joo-Young Kim

Institutions: Korea Advanced Institute of Science and Technology, Kyungpook National University, Ulsan National Institute of Science and Technology, Kwangwoon University, Yonsei University, Sungkyunkwan University

Language: English

Topic: Advanced Memory and Neural Computing

Subfield: Electrical and Electronic Engineering

Field: Engineering

Domain: Physical Sciences

SDG: Industry, innovation and infrastructure

Open Access status: closed

Funder: Institute for Information and Communications Technology Promotion

OpenAlex ID: W4414693305

FWCI: 0.227

Cites: 31

Cited by: 1

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