VLSI Design Course with FPGA Implementation of Pipelined RISC-V Processor
Year: 2025
Type: conference-paper
Authors: Siu Hong Loh, Gui Ye Tan, Jia Jia Sim
Institution: Universiti Tunku Abdul Rahman
Language: English
Subfield: Electrical and Electronic Engineering
Field: Engineering
Domain: Physical Sciences
Open Access status: closed
OpenAlex ID: W4414940411