Achieving 400 Gbps Single-Flow Throughput with Minimal CPU Core Usage through Optimized DPDK and SmartNIC Implementation
Year: 2025
Type: conference-paper
Authors: Chih-Yuan Cheng, Pang-Wei Tsai, Wei-Cheng Liao, Li-Sheng Chang
Institution: National Cheng Kung University
Language: English
Subfield: Hardware and Architecture
Field: Computer Science
Domain: Physical Sciences
Open Access status: closed
OpenAlex ID: W4414940913
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