Optimized RSA Hardware Accelerator Design For Blockchain Networks: 2048-Bit Implementation
Year: 2025
Type: conference-paper
Authors: T.R. Dinesh Kumar, S.Sivasaravana Babu, A. Yogaraj, A.N. Naveen, R. Pranavesh, A. Shiva
Language: English
Subfield: Information Systems
Field: Computer Science
Domain: Physical Sciences
Open Access status: closed
OpenAlex ID: W4415004555