Year: 2025
Type: article
Abstract: In this study, 2D, 2.1D, 2.3D, 2.5D, 3D. 3.3D, and 3.5D IC integrations will be presented and updated. Chiplet communication such as bridges embedded in build-up package substrate and fan-out epoxy molding compound (EMC) with RDLs (redistribution layers) will be examined and updated. The high volume products by Cu–Cu hybrid bonding will be presented. High bandwidth memory (HBM) and customized HBM (cHBM) and CoWoS (chip on wafer on substrate) and CoPoS (chip on panel on substrate) are the key elements of high-performance computing (HPC) products driven by artificial intelligence (AI) will be discussed. CoWoS-S, CoWoS-R, and CoWoS-L will be systematically presented. Glass-core substrates and glass-core interposers will be provided. 3D heterogeneous integration of photonic IC (integrated circuits) (PIC) and electronic IC (EIC) driven by AI and high-speed communications will be presented. Some recommendations will be provided.
Source: Journal of Electronic Packaging
DOI: 10.1115/1.4070106
Author: John H Lau
Language: English
Topic: 3D IC and TSV technologies
Subfield: Electrical and Electronic Engineering
Field: Engineering
Domain: Physical Sciences
Open Access status: bronze
Funder: Strong
OpenAlex ID: W4415081022