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ResNet50-based testbench development for the SEE evaluation of the AMD Versal SoC AIEngines

Year: 2025

Type: conference-paper

Source: HAL (Le Centre pour la Communication Scientifique Directe)

Authors: Achaq, Salma, Pouget, Vincent, Artola, Laurent, Boch, Jérôme

Institutions: Office National d'Études et de Recherches Aérospatiales, Université de Toulouse, Institut d'Électronique et des Systèmes, Université Paris-Saclay, Département Traitement de l’Information et Systèmes

Language: English

Topic: Embedded Systems Design Techniques

Subfield: Hardware and Architecture

Field: Computer Science

Domain: Physical Sciences

Open Access status: closed

OpenAlex ID: W4415319790

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