Year: 2025
Type: article
Abstract: ABSTRACT The growing demand for artificial intelligence and high‐performance computing accelerates concerns over leakage power in highly integrated semiconductor systems. Power gating can reduce the leakage power by disconnecting idle logic blocks from the power supply through a sleep transistor. However, conventional metal‐oxide‐semiconductor field‐effect transistor‐based sleep transistors exhibit significant leakage currents and area overhead. As promising alternatives for power gating devices, microelectromechanical systems (MEMS) switches have gained significant attention due to their near‐zero off‐state leakage current. Nevertheless, their practical use in power gating has been limited by a fundamental trade‐off between low on‐resistance and fast switching time. This study demonstrates that extreme minimization of the air gap is the key to simultaneously reducing on‐resistance and switching time. By introducing a 20 nm nano air gap and high‐stiffness structural design, we realize—for the first time—a MEMS switch that combines ultra‐low on‐resistance (0.95 Ω) with ultra‐fast switching time (30 ns), while maintaining off‐state leakage below 100 fA. All fabrication processes remain within the back‐end‐of‐line thermal budget, enabling monolithic 3D integration with minimal area overhead. These results establish nano gap MEMS switches as strong candidates for power gating in next generation low‐power semiconductor systems.
Source: Advanced Electronic Materials
Authors: Tae‐Soo Kim, So‐Young Lee, Yu‐Hyun Shim, Sung‐Ho Kim, Yong‐Bok Lee, Jun‐Bo Yoon
Language: English
Subfield: Electrical and Electronic Engineering
Field: Engineering
Domain: Physical Sciences
Open Access status: gold
Estimated APC paid: $3,560
Awards: G3548335330, G3930899909
OpenAlex ID: W4417292470