Losses Evaluation on Parallel Diodes Using a Double Pulse Test Circuit
Year: 2025
Type: conference-paper
Abstract: This paper aims to optimize efficiency by combining diodes, such as SiC Schottky or PiN Si in parallel. For each combination, conduction and switching losses are estimated using datasheet in addition to double pulse test circuit validation. The parallelization of each diode is studied to propose the best configuration.
Authors: Alves de Lima Henn, Gustavo, Reymond-Laruina, Frédéric, de Oliveira Filho, Herminio Miguel, Phulpin, Tanguy
Institutions: Université Paris-Saclay, CentraleSupélec
Language: English
Subfield: Electrical and Electronic Engineering
Field: Engineering
Domain: Physical Sciences
Open Access status: green
OpenAlex ID: W6890125434
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