An Ultra-Efficient Approximate Multiplier with Error Compensation for Error-Resilient Applications
Year: 2024
Type: article
Abstract: Approximate computing offers a pathway to boost hardware efficiency for error-resilient tasks such as neural networks and image processing by prioritizing speed over absolute accuracy. This briefing introduces an ultra-efficient approximate multiplier featuring error compensation. It integrates a constant compensation term for the least significant half of the product, achieving a nuanced hardware-accuracy equilibrium. Further refining precision is a low-complexity error compensation module (ECM). Through simulation with HSPICE utilizing 7nm tri-gate FinFET technology, this design significantly amplifies the energy-delay product, surpassing both exact and existing approximate designs by averages of 77% and 54% respectively. MATLAB simulations corroborate its accuracy, aligning closely with exact multipliers commonly employed in neural networks, boasting an average Peak Signal-to-Noise Ratio (PSNR) exceeding 51dB in image multiplication. Consequently, it emerges as a compelling substitute for precise multipliers in practical, error-resilient applications.
Author: Kanala Vijaya Swathi, S. Lakshmi Kanth
Language: English
Subfield: Electrical and Electronic Engineering
Field: Engineering
Domain: Physical Sciences
Open Access status: green
OpenAlex ID: W6893154014
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