Accelerating Scientific Applications with the NVIDIA Grace Hopper Platform
Year: 2024
Type: article
Abstract: NVIDIA GH200 Grace Hopper Superchip is a breakthrough processor designed from the ground up for giant-scale AI and HPC applications. Building on a decade of GPU acceleration, Grace-Hopper realizes NVIDIA NVLink Chip-to-chip (C2C) interconnection, with a bandwidth of 900 GB/s between the Grace CPU and the Hopper GPU. C2C enables coherent memory at 7x the bandwidth of PCIe Gen 5. This removes the conceptual CPU/GPU memory divide and lowers barriers for scientists accelerating their applications. With more application code executing on GPUs, workload performance becomes increasingly susceptible to non-GPU limiters like data movement and CPU performance (Amdahl s Law). Grace combines 72 Arm Neoverse-V2 cores with NVIDIA Scalable Coherency Fabric (SCF), a distributed cache and mesh fabric with 3.2 TB/s bi-section bandwidth. This high bandwidth mesh enables one NUMA node for all 72 CPU cores, simplifying multi-core programming. Each core implements a 512-bit SVE2 SIMD pipeline for a total CPU FP64 theoretical peak of 7.1 teraflops. When combined with the up to 500 GB/s memory bandwidth of the LPDDR5X, Grace delivers twice the performance-per-Watt of conventional x86-64 CPUs. This session presents HPC and AI workload performance results with a technical deep-dive into the specific features of Grace-Hopper that accelerate each workload. Attendees will gain a deeper understanding of how to extract the performance offered by Grace-Hopper and realize the potential of this innovative, energy-efficient platform for science and industry.
Author: Fang, Wei
Institutions: Nvidia (United Kingdom), Nvidia (United States)
Language: English
Subfield: Hardware and Architecture
Field: Computer Science
Domain: Physical Sciences
Open Access status: green
OpenAlex ID: W6893217547
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