Design of 4-bit Binary Weighted DAC in 180nm CMOS Technology
Year: 2024
Type: article
Abstract: In this paper, a method for implementing 4-bit binary weighted digital to analog converter using cadence virtuoso 180nm technology is presented. The presented DAC is designed at 1.8v power supply. Primarily a differential amplifier of gain 32.86db is followed by an operational amplifier of gain 56.90 db is designed using CMOS technology. A High gain operational amplifier helps in achieving better linearity and reduced distortions. The designing of this DAC involves creating transistor level schematic design followed by simulation using transient analysis. DAC’s serve as fundamental building blocks in various applications like Audio and communication Systems.
Authors: Jahnavi, E., Geethamrutha, U., Rehman, B. Khaleelu, Chandrasekhar, E., Chandrasekhar, P.
Language: English
Subfield: Biomedical Engineering
Field: Engineering
Domain: Physical Sciences
Open Access status: green
OpenAlex ID: W6911973610