Work

Influence of Al co-implantation on Ga distribution in p-type Ge

Year: 2025

Type: article

Abstract: Pure Ge-based devices are of high interest for the development of complementary-metal-oxide-semiconductor (CMOS) technology in a wide range of applications, from standard microelectronics to more innovative applications such as CMOS photonics. However, the size reduction of Ge devices is limited by dopant activation. In this work, Ge p -type doping with Ga is studied in the presence of Al using conventional CMOS processes. Similar doses of Ga and Al ions were implanted or co-implanted in Ge (100) single crystals. Ga and Al atomic distributions were studied by secondary ion mass spectrometry, atom probe tomography, and transmission electron microscopy before and after rapid thermal annealing. Ga implantation leads to Ge amorphization and dislocation loops formation after subsequent recrystallization. These dislocation loops are shown to significantly limit the Ga doping level due to Ga segregation. Ge amorphization was not observed after Al implantation, and an entire Al dose of 3.5 × 10 15 at cm −2 is fully soluble in Ge. However, Al activation is limited, suggesting that a large part of Al atoms occupies inactive interstitial sites. The presence of Al in Ga and Al co-implanted Ge is shown to prevent the formation of dislocation loops during annealing, and thus, to promote Ga full activation. This behavior is explained by the different diffusion mechanisms of Ga and Al in Ge. These observations suggest that a p -type doping level close to 1 at%, Ga solubility limit in Ge, could be reached in Ge by adjusting Al implantation conditions with CMOS doping process conditions. • Lateral size of Ge-based devices is limited due to doping levels smaller than in Si. • Ga doping level in Ge is shown to be limited due to segregation at dislocation loops. • Al co-implantation with Ga is shown to prevent dislocation loop formation in Ge. • Al and Ga co-implantation should allow high Ga doping levels to be reached in Ge.

Source: Materials Science in Semiconductor Processing

DOI: 10.1016/j.mssp.2025.109877