Secured AES 256 Using Verilog
Year: 2025
Type: article
Abstract: Although many algorithms were originally developed to encrypt and decode data, previous methods are not effective in protecting large amounts of sensitive information. As a result, AES was developed as a new standard for data encryption and decryption. AES was initially used primarily to encrypt highly sensitive data, but later became the industry standard for data protection for many Internet applications. Its main purpose is to protect sensitive data, and it is sometimes used to improve data security in backend network systems. Verilog offers much faster runtime and propagation delay for both data encoding and decoding than other HDL languages, which is the main argument for switching from standard VHDL to it. Before AES, DES was used as the encryption standard. The main drawback of DES is that the fixed key size of 56 bits. To make it more secured AES with key size 256bit size used.
Authors: Amal K. B, Rachana M. K
Language: English
Subfield: Artificial Intelligence
Field: Computer Science
Domain: Physical Sciences
Open Access status: green
OpenAlex ID: W6930801047
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