Beyond Moore — From 3‑D Chiplets to 4‑D Klein‑Space Folding
Year: 2025
Type: article
Abstract: Conventional transistor-density scaling, described by Moore's Law, has slowed markedly since 2012, signalling its practical end as a primary metric for progress in the semiconductor industry. We propose a Composite Performance Index (CPI) that combines compute throughput, energy efficiency, and cost to more accurately capture progress in the post-CMOS era. By analyzing public data from 28 nm to 2 nm process nodes, we show that while density gains plateau, the CPI continues to improve at a rate of approximately 10x per decade, driven by innovations in packaging, architecture, and materials. This paper discusses the physical limits of traditional scaling, the economic drivers compelling a new approach, and the policy implications of adopting a more holistic metric. An open dataset and Python notebooks for replication are provided.
Author: margolin, ido
Institution: Technion – Israel Institute of Technology
Language: English
Subfield: Electrical and Electronic Engineering
Field: Engineering
Domain: Physical Sciences
Open Access status: green
OpenAlex ID: W6931058537
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