Improvement of digital and analog/RF performances of stacked gate oxide JLTFET using heterostructure and lightly doped drain
Year: 2025
Type: article
Abstract: In this paper, a novel heterostructure stacked gate oxide junctionless tunnel field effect transistor (HS-SGO-JLTFET) with a lightly doped drain (LDD) region is proposed. The low band gap material (InAs) in the source region generates a stronger electric field in the source-channel junction, thereby increasing the ON current to 1.8×10-4 A/µm. Conversely, the lightly doped drain region near the channel end mitigates the electric field in the channel-drain junction, reducing the ambipolar current to 1.26×10-15 A/µm. Furthermore, the performance of the proposed device is analyzed with respect to analog/RF parameters. In this regard, the LDD-HS-SGO-JLTFET exhibits a smaller gate-to-drain capacitance (Cgd) of 0.14 fF, a larger transconductance (gm) of 840 µs, a higher cutoff frequency (fT) of 271 GHz, a bigger gain bandwidth product (GBWP) of 112 GHz, and a lower transit time ( ) of 6.55×10-13 s compared to the SGO-JLTFET. These improvements demonstrate that the proposed device is highly suitable for low-power and high-frequency applications.
Source: OICC Press Journals
Authors: Pourahmadi, Mohammad, Alavi-Rad, Hosein
Language: English
Subfield: Electrical and Electronic Engineering
Field: Engineering
Domain: Physical Sciences
Open Access status: green
OpenAlex ID: W6936522808
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