Work

A Dual-Core RISC-V Processor with a Two-Level Programmable Cache Emulation and Test System

Year: 2024

Type: dissertation

Source: RIT Scholar Works (Rochester Institute of Technology)

Author: Figorito, Marcus

Language: English

Topic: Parallel Computing and Optimization Techniques

Subfield: Hardware and Architecture

Field: Computer Science

Domain: Physical Sciences

Open Access status: closed

OpenAlex ID: W6990561361

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