A Performance Analysis of Pseudo Nmos Logic for Process Parameters
Year: 2025
Type: article
Abstract: In the paper, we study linear operators Wide fan-in logic gates when implemented in static complementary CMOS logic consume a significant area overhead, consume a large power consumption, and have a large propagation delay.The circuit design issues of this family are discussed. Also, it is compared with the conventional CMOS logic from the circuit design issues of this family are discussed. Also, it is compared with the conventional CMOS logic from the points of view of the area, the average propagation delay, the average power consumption, and the logic swing using a proper figure of merit. The effects of technology scaling and process variations on this family are investigated.
Author: International Journal of Advanced Research and Innovations
Language: English
Subfield: Electrical and Electronic Engineering
Field: Engineering
Domain: Physical Sciences
Open Access status: hybrid
OpenAlex ID: W7084946418
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