Smart Retail Automation via FPGA–MCU Co-Design: A Low-Latency and Inventory-Aware Vending Architecture
Year: 2025
Type: article
Abstract: This research presents a unified FPGA–MCU co-design framework for low-latency smart vending systems. The architecture integrates Xilinx Vivado 2023.1 FPGA simulation with an ESP32 microcontroller for real-time control and telemetry. A mathematical latency–throughput model is derived from pipeline theory and validated through simulation, achieving a 40% latency reduction compared with MCU-only designs. The paper further introduces coin-hopper inventory control, AES-secured communication, and mailbox-based cross-domain synchronization, combining deterministic hardware control with flexible cloud connectivity. This work contributes to the broader field of embedded co-design and IoT automation by demonstrating a scalable hybrid architecture applicable to healthcare kiosks, hostels, and public vending infrastructures.
Author: Mandhane, Mantra
Institution: Malaviya National Institute of Technology Jaipur
Language: English
Subfield: Hardware and Architecture
Field: Computer Science
Domain: Physical Sciences
Open Access status: green
OpenAlex ID: W7104020600
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