InvMUX: Cascaded Inverter-MUX-Based Logic Locking Against Machine Learning Attacks
Year: 2025
Type: conference-paper
Abstract: Logic locking has emerged as a promising approach to protect intellectual property (IP) against malicious threats, yet it faces challenges from emerging machine learning-based attacks. While multiplexer (MUX)-based logic locking is considered more secure due to reduced structural information leakage, recently reported machine learning (ML)-based attacks can still recover correct key bits by exploiting structural differences between input ports. InvMUX is proposed to minimize structural disparities between input ports by strategically inserting inverter-coupled branches at selected ports, effectively countering ML-based attacks. Experimental results demonstrate that InvMUX reduces the portion of correctly recovered key bits to 17.9% on average against recently reported ML-based attacks while providing 77.3% more candidate ports for enhanced design flexibility.
Authors: Zijian Long, Han Zhang, Juncheng Chen, Tong Lin, Bah Hwee Gwee
Institution: Nanyang Technological University
Language: English
Subfield: Hardware and Architecture
Field: Computer Science
Domain: Physical Sciences
Open Access status: gold
OpenAlex ID: W7115705419