Development of a high-voltage cascaded SiC MOSFET dynamic reverse bias testing power supply using separate drive and single-channel signal tree synchronization control
Year: 2026
Type: article
Abstract: With the rapid development of high-voltage silicon carbide (SiC) devices in medium- and high-power applications such as electric grids, renewable energy systems, and electric vehicles, understanding their dynamic reverse bias (DRB) behavior under high-voltage operation has become essential for ensuring device reliability and optimizing circuit performance. This work focuses on DRB testing requirements for 6.5 kV-class SiC MOSFETs and presents the design and implementation of a high-voltage cascaded SiC MOSFET DRB testing power supply utilizing separate drive and single-channel signal tree synchronization control. By proposing a single-signal multi-device driving method, the power supply enables high-speed coordinated driving of a half-bridge structure composed of 2 × 4 1.7 kV SiC MOSFETs using only one control signal, thus simplifying the control complexity of high-voltage cascaded systems. Furthermore, by relying solely on the inherent synchronization of the drive design, a single-device voltage utilization of up to 80.88 % was achieved without external voltage-balancing circuits. Testing demonstrates that the power supply can deliver an output voltage of up to 5.5 kV, which meets the testing requirements for 6.5 kV-class SiC devices, with a switching frequency of 100 kHz and a voltage slew rate of 275 V/ns. Additionally, the power supply underwent at least 100 h of load-bearing operational testing, verifying its long-term operational capability.
Authors: Hao Yan, Xuebao Li, Yan Pan, Jinlong Lu, Rui Jin, Zhibin Zhao
Language: English
Subfield: Electrical and Electronic Engineering
Field: Engineering
Domain: Physical Sciences
Open Access status: hybrid
Estimated APC paid: $3,540
Award: G7765868079
OpenAlex ID: W7124267273