Work

Backpass Trees on a Mixed Route Graph for Accelerated FPGA Routing

Year: 2025

Type: article

Source: Russian Microelectronics

DOI: 10.1134/s1063739725700106

Authors: A. Yu. Chistiakov, M. A. Zapletina

Institution: Kurchatov Institute

Language: English

Topic: VLSI and FPGA Design Techniques

Subfield: Electrical and Electronic Engineering

Field: Engineering

Domain: Physical Sciences

SDG: Industry, innovation and infrastructure

Open Access status: closed

OpenAlex ID: W7128379305

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Cites: 8

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