Year: 2026
Type: article
Abstract: In high-resolution successive approximation register (SAR) analog-to-digital converters (ADCs), sampling thermal (kT/C) noise represents a fundamental performance bottleneck as it remains unaffected by quantization noise shaping. While kT/C cancellation techniques exist, their efficacy is often constrained by incomplete preamplifier settling, which imposes a design trade-off: achieving low residual noise requires either high power consumption to increase bandwidth or an extended noise-extraction window that degrades linearity due to input signal excursions. This paper proposes a triple-sampling kT/C cancellation technique that overcomes these limitations by introducing an additional sampling phase, splitting the noise-extraction window into smaller intervals. Circuit-level periodic steady-state (PSS) and periodic noise (Pnoise) simulations demonstrate that the proposed method reduces overall input-referred noise by approximately 23% compared to a conventional cancellation scheme. Furthermore, transient noise simulations and FFT-based spectral analysis of a noise-shaping SAR ADC confirm that the proposed scheme achieves a 2.4-dB improvement in the spurious-free dynamic range (SFDR) while maintaining a comparable signal-to-noise and distortion ratio (SNDR). These enhancements are achieved with a minimal power overhead of only 1.6%. The triple-sampling approach offers a power-efficient and linear solution for high-resolution SAR ADCs.
Source: Electronics
Authors: Yeong Hui Kim, Jae Hoon Shim
Institution: Kyungpook National University
Language: English
Subfield: Biomedical Engineering
Field: Engineering
Domain: Physical Sciences
Open Access status: gold
Estimated APC paid: $2,896
Funder: IC Design Education Center
OpenAlex ID: W7128802862