Year: 2026
Type: article
Abstract: - RC4 protocol is most popular Cipher in Cryptography. In this paper, we present the study of the efficient design of RC4 stream cipher, and proposing the efficient architecture for cipher. The concept of loop unrolling and pipeline combined to produce the 2 RC4 key stream bytes per clock cycle. The design is compared with the previous proposed paper and to check the how much cycles required for complete the individual KSA and PRGA modules and together the RC4 Stream Cipher. The Design is built using the XILINX 13.2 on Vertex ML605 Evaluation FPGA Board.
Author: G. V. R. Sagar
Language: English
Subfield: Artificial Intelligence
Field: Computer Science
Domain: Physical Sciences
Open Access status: diamond
OpenAlex ID: W7128978261
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