Work

Accelerating dilated Winograd convolution with fused GPU kernel using tensor cores

Year: 2026

Type: article

Abstract: 2D convolutional neural networks (CNNs) achieve remarkable accuracy across diverse computer vision tasks, yet their inference efficiency remains suboptimal. As a fast convolution algorithm, Winograd convolution can significantly accelerate convolution operations, which constitute the primary performance bottleneck in CNNs. However, existing GPU-based implementations are restricted to accelerating standard convolution with unit dilation, while lacking support for dilated convolution. We propose TC-DWC, a GPU-based 2D Winograd convolution implementation tailored for dilated convolution, which effectively accelerates dilated convolution tasks across various configurations. TC-DWC employs a two-step tile reorganization scheme that reconciles the incompatibility between Winograd convolution and dilated convolution. Moreover, it leverages specialized high-throughput tensor cores (TCs), replacing conventional vector units to accelerate the computationally dominant matrix multiplications. To alleviate TC-DWC’s substantial memory footprint, we further develop a multi-stage kernel fusion strategy that eliminates intermediate array allocations, yielding Fused TC-DWC. Experimental results demonstrate that, for single convolutional layers, TC-DWC and Fused TC-DWC deliver average speedups of $$1.56\times $$ 1.56 × (up to $$2.45\times $$ 2.45 × ) and $$1.29\times $$ 1.29 × (up to $$1.80\times $$ 1.80 × ) over cuDNN optimal implementation, respectively, with Fused TC-DWC reducing memory footprint to 35% of TC-DWC and 55% of cuDNN. For end-to-end inference of CSRNet and DLinkNet34, TC-DWC and Fused TC-DWC deliver average speedups of $$1.38\times $$ 1.38 × (up to $$1.41\times $$ 1.41 × ) and $$1.20\times $$ 1.20 × (up to $$1.22\times $$ 1.22 × ) over PyTorch baseline, respectively, with Fused TC-DWC enabling support for larger batch sizes.

Source: Journal of King Saud University - Computer and Information Sciences

DOI: 10.1007/s44443-025-00452-1

Authors: Shixiang Zhang, Jianguo Liang, You Fu, Rong Hua, Jianzhi Yu, Qianqian Li

Institutions: Shandong University of Science and Technology, Qufu Normal University

Language: English

Topic: Parallel Computing and Optimization Techniques

Subfield: Hardware and Architecture

Field: Computer Science

Domain: Physical Sciences

Open Access status: gold

Estimated APC paid: $1,990

Funder: Natural Science Foundation of Shandong Province