Year: 2026
Type: article
Abstract: As the process node is scaled down, the spin-transfer-torque magnetic random-access memory (STT-MRAM) exhibits higher memory density than the static random-access memory (SRAM), making it one of the more promising successors of the low-level on-chip cache memory. However, the low read margin (RM) of the magnetic tunnel junction (MTJ) in STT-MRAM can limit the achievable read accuracy. We implemented 2-bit channel quantization for error-correcting code (ECC) schemes and explored the trade-offs between improved read accuracy and factors such as circuit area, power consumption, and latency. The proposed quantization scheme consists of a sensing amplifier-based 2-bit quantizer and MTJ resistor-based soft-decision thresholds. Compared to 1-bit channel quantization using the Bose–Chaudhuri–Hocquenghem (BCH) code, the proposed 2-bit quantization architecture achieves a fourfold reduction in frame error rate (FER) from 8.0×10−4 to 2.0×10−4 when paired with polar codes and successive cancellation (SC) decoding. Additionally, this approach results in decoding complexity that is only 1/13th of that required for BCH at a 0.7 code rate.
Source: Electronics
Authors: Yecheng Yang, Yitong Lai, Pingping Chen, Shaohao Wang
Institution: Fuzhou University
Language: English
Subfield: Computer Networks and Communications
Field: Computer Science
Domain: Physical Sciences
Open Access status: gold
Estimated APC paid: $2,896
Award: G8474829718
OpenAlex ID: W7137939762