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In-SoIC ESD Protection for Chiplet-Based 3D Microsystems: Future Research Directions

Year: 2026

Type: article

Abstract: Heterogeneous integration opens a pathway to three-dimensional chiplet-based microsystem chips. Electrostatic discharge reliability is a major challenge to future smart chips featuring rich functionalities and ultra performance, utilizing advanced heterogeneous integration and packaging technologies. This paper discusses emerging challenges and future research directions in developing robust electrostatic discharge protection solutions for future systems-on-integrated-chiplets.

Source: Semiconductors and Heterogeneous Integration

DOI: 10.3390/shi1010002

Authors: Xunyu Li, Runyu Miao, Zijian Yue, Albert Wang

Institution: University of California, Riverside

Language: English

Topic: Electrostatic Discharge in Electronics

Subfield: Electrical and Electronic Engineering

Field: Engineering

Domain: Physical Sciences

Open Access status: diamond

OpenAlex ID: W7140136901

FWCI:

Cites: 29

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