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Corrigendum: A data-centric chip design agent framework for Verilog code generation

Year: 2026

Type: erratum

Source: ACM Transactions on Design Automation of Electronic Systems

DOI: 10.1145/3802988

Authors: Kaiyan Chang, Wenlong Zhu, Kun Wang, Xinyang He, Nan Yang, Zhirong Chen, Dantong Jin, Cangyuan Li, Yunhao Zhou, Hao Yan, Zhuoliang Zhao, Yuan Cheng, Mengdi Wang, Shengwen Liang, Yinhe Han, Xiaowei Li, Huawei Li, Ying Wang

Institutions: Chinese Academy of Sciences, Institute of Computing Technology, University of Chinese Academy of Sciences, Zhejiang Lab, Shanghai University, Nanjing University

Language: English

Topic: Embedded Systems Design Techniques

Subfield: Hardware and Architecture

Field: Computer Science

Domain: Physical Sciences

Open Access status: closed

OpenAlex ID: W7153490789

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